1. Field of the Invention
Systems and methods for on-chip interconnect are disclosed. More specifically, systems and methods are described for transmission of signals as localized wave packets that propagate along the interconnect lines to trigger the receivers. In addition, the present invention enables time division multiplexing of signals on a single interconnect.
2. Description of the Background Art
On-Chip global interconnect is among the top challenges in integrated circuit technology scaling due to the rapidly increasing operation frequencies and the growing chip size. With clock frequencies in multi gigahertz range, inductance, capacitance and other frequency dependant factors have to be taken into consideration. For high frequency range, frequency related dispersions and skin effect are other concerns while designing interconnects. Other global interconnects, such as data bus and control lines, face similar complications.
In interconnect design, the general practice in transmitting signals is to control the voltage level of the entire interconnect line and connected receivers. As a result, the long line and all the receivers are very heavy loads to the drivers. Repeaters are thus needed to overcome the propagation delay. This however adds more chip area and increases the power consumption of the system.